1.19 A Mealy sequential circuit is implemented using the circuit shown in Problem 1.26. of the clock. (a) Complete the tming diagram shown here. Indicate the proper times to read the output (Z). Assume that del” is Ons and that the propagation delay for the flip-flop and XOR gate has a minal value of 10ns. The clock period is 100ns. (b) Assume the folowing delays: XOR gate 10 to 20ns:
OR
OR