You have a 2-way set associative L1 cache that is 8KB, with4-word cache lines. You get the following sequence of writes to thecache — each is a 32-bit address in hexadecimal: 0x32E4 0x80000x1F50 0x8004 0x72EC 0xD00C 0x800C 0x72E8 0x4008 0xD000 0x82E0
How many cache misses occur with an LFU (Least Frequently Used)policy? Give a detailed answer and fill in the table below for eachaddress reference?
Answer