3. The following question pertains to latches (a) (3 points) Give the design of a latch that holds memory using only NAND gates. It should have two inputs: Set, which sets the output to 1 . Reset, which sets the output to 0 The circuit should hold its state otherwise (b) (2 points) Give the truth table for this circuit (c) (3 points) Improve the design of the previous circuit so that it’s inputs
OR
OR