PLEASE ANSWER
9.11 Explain in what way a modern DMA controller that processes a data structure containing DMA transfer information is better than a simple DMA controller shown in Fig. 9.20 and how a modern controller may affect the performance of a system CPU Memory Interrupt (int) Bus request (br) Bus grant (bgl Address Decoder Memory Unit Memory Controller ack rdr as ack rd WT as Control Bus (CB) Data Bus (DB) Address Bus (AB ack rd wr
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