Consider Memory Mapped I/O where there are three 4 X 3 memory modules and four I/O devices. Assuming that Higher-Order Memory Interleaving is utilized, answer the following questions a) Draw the corresponding hardware block diagram showing interconnection between processor, memory modules, and I/O devices via address lines, data lines and control lines (Read and Write signals). b) Identify memory and I/O addresses spaces (i.e. list what addresses identify a memory word and what address identify an
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