Design 3-bit grey counter, the counter has w input if w # 0 then the co counting and if w 1 the counter will stop counting. The output z will set to 1 whenever the count has odd number of 1’s 1. List inputs, Outputs and the count sequence. (5pts) output 군 2. Draw the finite State machine for the counter. (10pts) 3. Draw the transition table cextra columns for the
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