using a 7476 ic jk flip flop
Design of Counter Design, construct, and test a counter that goes through the following sequence of hi states: 0, 1, 2, 3, 6, 7 10, 11, 12, 13, 14,15, and back to 0 to repeat. Note that bina 4, 5, 8, and 9 are not used. The counter must be self- from any one of the four invalid states, the count pulses must transfer the ci of the valid
OR
OR