p-flop that D is kept HIGH and Q is initially LOW. Determine the Q 7. Apply the CLK, PRE, CLR waveforms of the figure below to a positive-edge-triggered D fi active-LOW asynchronous inputs. Assume that D is waveform. PRE 8. Refer to the counter circuit below and answer the following: CLK a. If the counter starts at 000, what will be the counter after 13 clock pulses? After 99 Pulses?