Problem #1 Consider general register set system architecture where four general purpose registers (say ssor for operations. The architecture supports 52 different instructions that al Ro, Ri, Ra, and Rs) are used by the processor ope have two operands. The effective addresses [of 16MB f the operands] are in the general-purpose registers. The system has a main memory. Prior to memory the fetched instruction is brought into memory y access, the memory address is placed in the Memory Address Register
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OR