PROBLEM 3 (20 PTs) -Pulse Detector: The circuit consists of a FSM and a flip flop. The timing resetn diagram shows the behavior of the circuit. The flip flop makes sure that x FSM Draw the State Diagram (any representation) of the given FSM (8 pts) clock clock resetn Show transcribed image text PROBLEM 3 (20 PTs) -Pulse Detector: The circuit consists of a FSM and a flip flop. The timing resetn diagram shows
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