The technical reference manual for the Cortex-A15 says that theGIC is memory mapped. That is, the core processors use memorymapped I/O to communicate with the GIC. Recall from Chapter 7 thatwith memory mapped I/O, there is a single address space for memorylocations and I/O devices. The processor treats the statusinstructions to access both memory and I/O devices. Based on thisinformation, what path through the block diagram below is used forthe core processors to communicate with the GIC?
Map this out in the diagram.
I
OR
OR